Visual Programming Language for Open FPGA
Designed to ease FPGA access even to non-expert programmers
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The Easy Way to Design DAQ Systems
Sci(entific)-Compiler is an innovative software tool to program the Open FPGA of CAEN boards: starting from a graphical diagram, it generates a firmware code that implements the required function and a C++/Python example software code to be used for DAQ software implementation.
I/O INTERFACE
Control Digital and Analog Input/output of the hardware devices
LOGIC GATE
A rich library that contains coincidence logic, boolean, functions, Gate and Delaym counters, timers, scaler, frequency meters, array of bit manipulation
OSCILLOSCOPE
Probe signals of each acquiring channel, even in the middle of the processing chain
CHARGE INTEGRATION
Control Digital and Analog Input/output of the hardware devices
ANALOG SHAPER AND PEAK STRETCHER
A rich library that contains coincidence logic, boolean, functions, Gate and Delaym counters, timers, scaler, frequency meters, array of bit manipulation
TRAPEZOIDAL FILTER
Probe signals of each acquiring channel, even in the middle of the processing chain
MATH LIBRARY
Control Digital and Analog Input/output of the hardware devices
STATE MACHINE
A rich library that contains coincidence logic, boolean, functions, Gate and Delay counters, timers, scaler, frequency meters, array of bit manipulation
ONLINE SPECTRUM
Probe signals of each acquiring channel, even in the middle of the processing chain
Why Sci-Compiler
THE EASIEST WAY TO DEVELOP YOUR FPGA FIRMWAREThe increasing use of programmable logic devices in trigger and data acquisition systems makes clear that having a general purpose platform and technicians dedicated to the firmware development is becoming more and more important.
The advantage is remarkable: a single programmable logic device includes the potentiality of hundreds of thousands of standard logic modules.
So we introduce an innovative method to simplify the firmware development. This method is based on a graphical programming interface consisting of blocks specifically developed for nuclear physics applications.
Block Building Interface
Sci-Compiler is a block-diagram-based software that uses a set of high-level functionalities (blocks) to mask the real firmware coding, which improves and speeds-up the R&D phase.
Placing and interconnecting the available blocks (e.g. oscilloscope, TDC, MCA, charge integration, etc.) on a diagram, it is able to automatically generate a VHDL code that implements the required function and deploy it to the FPGA. In this way, even a non-programmer user can write his own firmware code, focusing on the functional blocks of the application to be implemented more than on the VHDL/Verilog code to achieve the goal.
Automatic Firmware Code Simulation
Sci-Compiler allows to simulate the firmware code much faster than compilation, so the user can have a quick response on how the Signal Processing Algorithm implemented in the firmware is working. In fact, it is possible to add some input to the simulation (like an external signal) and set probing points in the block diagram. In this way it is possible to monitor the electrical signal in that point.
Debug Better with resource explorer
Sci-Compiler offers a built-in tool, called Resource Explorer, to connect one of the supported boards and test the features of the FPGA firmware. This tool allows to manage all Local Bus readout blocks placed in the firmware diagram, therefore it gives the possibility to read and write the configuration registers (i.e. Signal Processing parameters) and shows the readout instruments like Spectrum, Oscilloscope, etc. in a GUI, so that it is possible to change the signal processing parameters and test the results of acquisition live.
Compile Everywhere
Locally or remote? It’s on you.
Locally or remote? It’s on you.
Sci-Compiler allows the user to compile the FPGA firmware having a full FPGA compiler software running locally on your PC or using the Remote Customization Service without the need to have any extra software installed on your pc and high end Workstation.
CAEN makes a Remote Customization Service and Yearly Upgrade Plan available, to offer a high quality software product, with the needed flexibility to meet the users’ requirements.
Licensing Plans
All Sci-Compiler version allows not only to learn FPGA coding with block-diagram method, but also to test the functionalities on a real device. Sci-Compiler trial is a full version software, free to try on any supported board with firmware time-bomb of 30 min.
Free trial downloadEvaluation, Education
Smart Plan
Sci-Compiler software with dedicated support, latest update, remote or local compilation for DT1260 hardware only.
- Basic Hardware
- Up to 2 Channels
- RCS (1)
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Labs, Experiments
Pro Plan
Sci-Compiler full version with a dedicated Open FPGA hardware for evaluating and testing.
- High-spec Hardware
- Unlimited channels
- RCS priority (1)
- Support for upcoming hardware
- Flexible upgrade plans
(1) Remote Customization Service (RCS) is a CAEN service to easily obtain a final firmware for your target board within Sci-Compiler software. More >
Frequently Asked Questions
Sci-Compiler has been designed to generate code for Digitizer or Programmable Logic Unit hardware designed by CAEN SpA. Presently, SCI-Compiler PRO license supports the platform listed here.
Windows 10 or later.
The license of Sci-Compiler is a hybrid model between the one-time purchase and the subscription model. With a license of Sci-Compiler, you can use Sci-Compiler for as long as you want and install the minor and major updates for one year. If you wish to install a new update to Sci-Compiler and use Remote Customization Service after that, you will need to renew your license. Click here to learn more.
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