Sci-Compiler

Application-Notes Oscilloscope, Waveform, Digitizer, Sci-SDK, Readout Oscilloscope Basic Example Waveform Digitizer Dt1260 Sci-Sdk Readout An007

Usage of the oscilloscope module to monitor signal inside design

Introduction The Oscilloscope component in Sci-Compiler provides a powerful tool for monitoring analog signals connected to the analog inputs of the board, as well as internal signals within the designed diagram.

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Application-Notes Charge-Integration, Sci-SDK, Waveform, QDC, Spectroscopy, Readout Charge-Integration Advanced Example Waveform QDC Spectroscopy Dt1260 Sci-Sdk Readout An009

Implementing digital QDC in Sci-Compiler

Introduction Digital charge integration, also known as QDC (charge-to-digital conversion), is a technique used to measure the energy of particles or photons detected by photomultiplier tubes (PMTs) or silicon photomultipliers (SiPMs).

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Application-Notes List, Time Tag, Sci-SDK, Readout List Time Tag Basic Example Dt1260 Sci-Sdk Readout An010

Time-tag events and readout data using List Component

Introduction Time tagging of events in a high-energy detector system refers to the process of accurately measuring and recording the timing information associated with the detected events.

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Application-Notes Multi Channels, Hierarchical, Subdesign, Sci-SDK Multi Channels Hierarchical Oscilloscope Register Sci-Sdk

R5560/SE DAQs Horizontal Interconnections in Sci-Compiler project

Horizontal Interconnections This document explains how to use the FLAG signals and fast horizontal link between DAQ. Each DAQ is directly connected to the DAQ on the right and on the left with two kind of link:

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Application-Notes Multi Channels, Hierarchical, Subdesign, Sci-SDK Multi Channels Hierarchical Oscilloscope Register Sci-Sdk

Multi channels design with readout element in subdesign

Introduction SciCompiler’s advanced architecture allows hierarchical designs in multichannel application. This powerful feature enables designers to create complex systems by encapsulating functionality into discrete modules or blocks, which can then be nested within higher-level systems.

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